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microcode_ctl - Tool to update x86/x86-64 CPU microcode.
- Description:
microcode_ctl - updates the microcode on Intel x86/x86-64 CPU's
Packages
microcode_ctl-1.17-33.31.el6_10.x86_64
[4.6 MiB] |
Changelog
by Eugene Syromiatnikov (2020-10-30):
- Update Intel CPU microcode to microcode-20201027 release, addresses
CVE-2020-8694, CVE-2020-8695, CVE-2020-8696, CVE-2020-8698
(#1893243, #1893238):
- Addition of 06-55-0b/0xbf (CPX-SP A1) microcode (in microcode.dat)
at revision 0x700001e;
- Addition of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
microcode.dat) at revision 0x68;
- Addition of 06-a5-02/0x20 (CML-H R1) microcode (in microcode.dat)
at revision 0xe0;
- Addition of 06-a5-03/0x22 (CML-S 6+2 G1) microcode (in microcode.dat)
at revision 0xe0;
- Addition of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode (in microcode.dat)
at revision 0xe0;
- Addition of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode (in
microcode.dat) at revision 0xe0;
- Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
microcode-06-4e-03.dat) from revision 0xdc up to 0xe2;
- Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
microcode-06-55-04.dat) from revision 0x2006906 up to 0x2006a08;
- Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
microcode-06-5e-03.dat) from revision 0xdc up to 0xe2;
- Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode
(in microcode.dat) from revision 0x43 up to 0x44;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode (in microcode.dat)
from revision 0x1000157 up to 0x1000159;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode (in microcode.dat)
from revision 0x4002f01 up to 0x4003003;
- Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode (in
microcode.dat) from revision 0x5002f01 up to 0x5003003;
- Update of 06-5c-09/0x03 (APL D0) microcode (in microcode.dat) from
revision 0x38 up to 0x40;
- Update of 06-5c-0a/0x03 (APL B1/F1) microcode (in microcode.dat)
from revision 0x16 up to 0x1e;
- Update of 06-7a-08/0x01 (GLK-R R0) microcode (in microcode.dat)
from revision 0x16 up to 0x18;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode (in microcode.dat)
from revision 0x78 up to 0xa0;
- Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in microcode.dat)
from revision 0xd6 up to 0xde;
- Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
microcode.dat) from revision 0xd6 up to 0xe0;
- Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in microcode.dat)
from revision 0xd6 up to 0xde;
- Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
microcode (in microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in microcode.dat)
from revision 0xd6 up to 0xde;
- Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode (in microcode.dat)
from revision 0xca up to 0xe0.
|
microcode_ctl-1.17-33.26.el6_10.x86_64
[3.7 MiB] |
Changelog
by Eugene Syromiatnikov (2020-06-03):
- Update Intel CPU microcode to microcode-20200602 release, addresses
CVE-2020-0543, CVE-2020-0548, CVE-2020-0549 (#1795353, #1795357, #1827186):
- Update of 06-3c-03/0x32 (HSW C0) microcode from revision 0x27 up to 0x28;
- Update of 06-3d-04/0xc0 (BDW-U/Y E0/F0) microcode from revision 0x2e
up to 0x2f;
- Update of 06-45-01/0x72 (HSW-U C0/D0) microcode from revision 0x25
up to 0x26;
- Update of 06-46-01/0x32 (HSW-H C0) microcode from revision 0x1b up to 0x1c;
- Update of 06-47-01/0x22 (BDW-H/Xeon E3 E0/G0) microcode from revision 0x21
up to 0x22;
- Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xd6
up to 0xdc;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000151
up to 0x1000157;
- Update of 06-55-04/0xb7 (SKX-SP H0/M0/U0, SKX-D M1) microcode
(in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2000065
up to 0x2006906;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400002c
up to 0x4002f01;
- Update of 06-55-07/0xbf (CLX-SP B1) microcode from revision 0x500002c
up to 0x5002f01;
- Update of 06-5e-03/0x36 (SKL-H/S R0/N0) microcode from revision 0xd6
up to 0xdc;
- Update of 06-8e-09/0x10 (AML-Y22 H0) microcode from revision 0xca
up to 0xd6;
- Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xca
up to 0xd6;
- Update of 06-8e-0a/0xc0 (CFL-U43e D0) microcode from revision 0xca
up to 0xd6;
- Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xca
up to 0xd6;
- Update of 06-8e-0c/0x94 (AML-Y42 V0, CML-Y42 V0, WHL-U V0) microcode
from revision 0xca up to 0xd6;
- Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision
0xca up to 0xd6;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E3 U0) microcode from revision 0xca
up to 0xd6;
- Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xca up to 0xd6;
- Update of 06-9e-0c/0x22 (CFL-H/S P0) microcode from revision 0xca
up to 0xd6;
- Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xca up to 0xd6.
|
microcode_ctl-1.17-33.11.el6_10.x86_64
[2.8 MiB] |
Changelog
by Eugene Syromiatnikov (2019-05-09):
- Intel CPU microcode update to 20190507_Public_DEMO (#1697960).
|
microcode_ctl-1.17-25.6.el6_9.x86_64
[1.8 MiB] |
Changelog
by Petr Oros (2018-05-15):
- Update disclaimer text
- Resolves: #1575563
|
microcode_ctl-1.17-25.4.el6_9.x86_64
[1.2 MiB] |
Changelog
by Petr Oros (2018-01-15):
- Use right upstream source for revert
- Resolves: #1533978
|
microcode_ctl-1.17-25.2.el6_9.x86_64
[1.6 MiB] |
Changelog
by Petr Oros (2017-12-15):
- Update Intel CPU microde for 06-3f-02, 06-4f-01, and 06-55-04
- Add amd microcode_amd_fam17h.bin data file
- Resolves: #1527357
|