// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \
// RUN:   -target-feature +zve64x \
// RUN:   -disable-O0-optnone -emit-llvm %s -o - | \
// RUN:   opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s

#include <sifive_vector.h>

// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e8w1(
// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-RV64-NEXT:  entry:
// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 0, i64 1)
// CHECK-RV64-NEXT:    ret i64 [[TMP0]]
//
size_t test_sf_vsettm_e8w1(size_t tn) {
  return __riscv_sf_vsettm_e8w1(tn);
}

// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e8w2(
// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT:  entry:
// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 0, i64 2)
// CHECK-RV64-NEXT:    ret i64 [[TMP0]]
//
size_t test_sf_vsettm_e8w2(size_t tn) {
  return __riscv_sf_vsettm_e8w2(tn);
}

// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e8w4(
// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT:  entry:
// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 0, i64 3)
// CHECK-RV64-NEXT:    ret i64 [[TMP0]]
//
size_t test_sf_vsettm_e8w4(size_t tn) {
  return __riscv_sf_vsettm_e8w4(tn);
}

// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e16w1(
// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT:  entry:
// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 1, i64 1)
// CHECK-RV64-NEXT:    ret i64 [[TMP0]]
//
size_t test_sf_vsettm_e16w1(size_t tn) {
  return __riscv_sf_vsettm_e16w1(tn);
}

// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e16w2(
// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT:  entry:
// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 1, i64 2)
// CHECK-RV64-NEXT:    ret i64 [[TMP0]]
//
size_t test_sf_vsettm_e16w2(size_t tn) {
  return __riscv_sf_vsettm_e16w2(tn);
}

// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e16w4(
// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT:  entry:
// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 1, i64 3)
// CHECK-RV64-NEXT:    ret i64 [[TMP0]]
//
size_t test_sf_vsettm_e16w4(size_t tn) {
  return __riscv_sf_vsettm_e16w4(tn);
}

// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e32w1(
// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT:  entry:
// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 2, i64 1)
// CHECK-RV64-NEXT:    ret i64 [[TMP0]]
//
size_t test_sf_vsettm_e32w1(size_t tn) {
  return __riscv_sf_vsettm_e32w1(tn);
}

// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e32w2(
// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT:  entry:
// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 2, i64 2)
// CHECK-RV64-NEXT:    ret i64 [[TMP0]]
//
size_t test_sf_vsettm_e32w2(size_t tn) {
  return __riscv_sf_vsettm_e32w2(tn);
}

// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e64w1(
// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT:  entry:
// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 3, i64 1)
// CHECK-RV64-NEXT:    ret i64 [[TMP0]]
//
size_t test_sf_vsettm_e64w1(size_t tn) {
  return __riscv_sf_vsettm_e64w1(tn);
}

